Digital Lab – Expt-3 Full/Half Adder using NAND only

Half Adder using NAND gate only

fig 3.1


Full Adder using NAND gate only

To construct a full adder circuit, we’ll need three inputs and two outputs. Since we’ll have both an input carry and an output carry, we’ll designate them as CIN and COUT. At the same time, we’ll use S to designate the final Sum output. The resulting truth table is shown to the right.

Hmmm. This is looking a bit messy. It looks as if COUT may be either an AND or an OR function, depending on the value of A, and S is either an XOR or an XNOR, again depending on the value of A. Looking a little more closely, however, we can note that the S output is actually an XOR between the A input and the half-adder SUM output with B and CIN inputs. Also, the output carry will be true if any two or all three inputs are logic 1.

What this suggests is also intuitively logical: we can use two half-adder circuits. The first will add A and B to produce a partial Sum, while the second will add CIN to that Sum to produce the final S output. If either half-adder produces a carry, there will be an output carry. Thus, COUT will be an OR function of the half-adder Carry outputs. The resulting full adder circuit is shown here ( fig 3.2).

fig 3.2

Truth Table

0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1

fig 3.3

Using only NAND gates


LogicSIM Simulator ( EXE ) : logisim-win-2.7.1.exe


Run the LogicSic exe, File-Open the “CIRC” file. Play around with and find how the logicsim works.

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Posted on February 6, 2009, in Logic System Design and tagged . Bookmark the permalink. 15 Comments.

  1. how you reach to such diagram of full adder by using nand gate only .

  2. you websate i s good keep it up .just include circiuts using two bit binary full adder

  3. Thanks a tonne. Helped me for my Digital Logic Lab Exam tomorrow.

    I sometimes wonder what’s wrong with using AND,OR when you can design a simple logic than using NAND and NOR which are sometimes hard to grasp

  4. it’s too interesting & too brief.

  5. How thoughts will come to reach the full adder ckt using NAND gate?

  6. in half-adder using nand gates what is the truth table…please!!

  7. properly described

  8. Truth table will be same as the NORMAL HALF ADDER Truth Table. :)… Using NAND will change only the crkt design.. not the truth table 🙂

    A B | C S
    1 1 | 1 0
    1 0 | 0 1
    0 1 | 0 1
    0 0 | 0 0

  9. You wil be using the 7400 for the AND logic. Redraw the logic gates using the 2 sections of NAND in place of AND.

    help please!!!!!

  10. nice ckt diagram…its too easy to learn….:) 🙂

  11. it really helped me a lot………….

  12. 🙂


  14. i think what we have here now is enough for all beginners!

  15. good to know that 🙂

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